shift instruction speed

Comments

• shaolin007

  January 2005

  [b][red]This message was edited by shaolin007 at 2005-1-5 6:43:13[/red][/b][hr]
  : [b][red]This message was edited by estrose at 2005-1-5 4:57:18[/red][/b][hr]
  : Assembler shift-instruction:
  :
  : SHL {Register}, {Count}
  :
  : I understand that shift instruction is a microscheme inside a processor, like other instructions. I understand that processor executes a program unit inside a processor that does the shift as long as {Count} for shifting declares. So, there is a loop inside this instruction, i think.
  : Does the time needed to execute/perform shift-instruction depends from {Count} parameter?
  : Is SHL AX, 1h faster than SHL AX, 4ah?
  :
  : Thank you.
  :
  [green]
  It's all hardwired into the CPU and takes microseconds to accomplish. Shift instructions are primitive tasks that the CPU can do with little effort. Count has no effect on the execution of the instruction.
  
  http://www.online.ee/~andre/i80386/Opcodes/SAL-SAR-SHL-SHR.html
  
  There's probably not a loop type structute inside the ALU to accomplish these tasks, but who knows. Probably someone else can shed some light on that part.
  
  [/green]
  
  
  
  
  
• blitz

  January 2005

  : [b][red]This message was edited by shaolin007 at 2005-1-5 6:43:13[/red][/b][hr]
  : : [b][red]This message was edited by estrose at 2005-1-5 4:57:18[/red][/b][hr]
  : : Assembler shift-instruction:
  : :
  : : SHL {Register}, {Count}
  : :
  : : I understand that shift instruction is a microscheme inside a processor, like other instructions. I understand that processor executes a program unit inside a processor that does the shift as long as {Count} for shifting declares. So, there is a loop inside this instruction, i think.
  : : Does the time needed to execute/perform shift-instruction depends from {Count} parameter?
  : : Is SHL AX, 1h faster than SHL AX, 4ah?
  : :
  : : Thank you.
  : :
  : [green]
  : It's all hardwired into the CPU and takes microseconds to accomplish. Shift instructions are primitive tasks that the CPU can do with little effort. Count has no effect on the execution of the instruction.
  :
  : http://www.online.ee/~andre/i80386/Opcodes/SAL-SAR-SHL-SHR.html
  :
  : There's probably not a loop type structute inside the ALU to accomplish these tasks, but who knows. Probably someone else can shed some light on that part.
  :
  : [/green]
  :
  :
  
  On older processors, the time needed by the rotate/shift instructions was dependent on the number of bits involved:
  http://hysteria.sk/~mikro/Coding/PC/ASMINST.TXT
  
  Regards,
  Blitz
  
  
• CroW

  January 2005

  : : [b][red]This message was edited by shaolin007 at 2005-1-5 6:43:13[/red][/b][hr]
  : : : [b][red]This message was edited by estrose at 2005-1-5 4:57:18[/red][/b][hr]
  : : : Assembler shift-instruction:
  : : :
  : : : SHL {Register}, {Count}
  : : :
  : : : I understand that shift instruction is a microscheme inside a processor, like other instructions. I understand that processor executes a program unit inside a processor that does the shift as long as {Count} for shifting declares. So, there is a loop inside this instruction, i think.
  : : : Does the time needed to execute/perform shift-instruction depends from {Count} parameter?
  : : : Is SHL AX, 1h faster than SHL AX, 4ah?
  : : :
  : : : Thank you.
  : : :
  : : [green]
  : : It's all hardwired into the CPU and takes microseconds to accomplish. Shift instructions are primitive tasks that the CPU can do with little effort. Count has no effect on the execution of the instruction.
  : :
  : : http://www.online.ee/~andre/i80386/Opcodes/SAL-SAR-SHL-SHR.html
  : :
  : : There's probably not a loop type structute inside the ALU to accomplish these tasks, but who knows. Probably someone else can shed some light on that part.
  : :
  : : [/green]
  : :
  : :
  :
  : On older processors, the time needed by the rotate/shift instructions was dependent on the number of bits involved:
  : http://hysteria.sk/~mikro/Coding/PC/ASMINST.TXT
  :
  : Regards,
  : Blitz
  :
  :
  
  
  older cpus support only one shift per cycle by one bit.thats why they need [count] to be declared in CL/CX register:
  
  Bit 76543210
  ABCDEFGH
  ////////
  ABCDEFGHx
  Bit 76543210
  or
  
  Bit 76543210
  ABCDEFGH
  \\\\
  xABCDEFGH
  76543210
  
  newer CPUs have one line from each bit to every other bit which is controlled by a multiplex-chip.it needs more space on your cpu-die but offers shifts which are independ by the shift-count.
  
• estrose

  January 2005

  : : [b][red]This message was edited by shaolin007 at 2005-1-5 6:43:13[/red][/b][hr]
  : : : [b][red]This message was edited by estrose at 2005-1-5 4:57:18[/red][/b][hr]
  : : : Assembler shift-instruction:
  : : :
  : : : SHL {Register}, {Count}
  : : :
  : : : I understand that shift instruction is a microscheme inside a processor, like other instructions. I understand that processor executes a program unit inside a processor that does the shift as long as {Count} for shifting declares. So, there is a loop inside this instruction, i think.
  : : : Does the time needed to execute/perform shift-instruction depends from {Count} parameter?
  : : : Is SHL AX, 1h faster than SHL AX, 4ah?
  : : :
  : : : Thank you.
  : : :
  : : [green]
  : : It's all hardwired into the CPU and takes microseconds to accomplish. Shift instructions are primitive tasks that the CPU can do with little effort. Count has no effect on the execution of the instruction.
  : :
  : : http://www.online.ee/~andre/i80386/Opcodes/SAL-SAR-SHL-SHR.html
  : :
  : : There's probably not a loop type structute inside the ALU to accomplish these tasks, but who knows. Probably someone else can shed some light on that part.
  : :
  : : [/green]
  : :
  : :
  :
  : On older processors, the time needed by the rotate/shift instructions was dependent on the number of bits involved:
  : http://hysteria.sk/~mikro/Coding/PC/ASMINST.TXT
  :
  : Regards,
  : Blitz
  :
  :
  
  
  Yes indeed, there is something said about the shift on older computers:
  
  
  " The 80286 and 80386 microprocessors limit the COUNT
  value to 31. If the COUNT is greater than 31, these
  microprocessors use COUNT MOD 32 to produce a new
  COUNT between 0 and 31. This upper bound exists to
  limit the amount of time an interrupt response will
  be delayed waiting for the instruction to complete.
  
  Multiple SHLs that use 1 as the COUNT may be faster
  and require less memory than a single SHL that uses
  CL for COUNT.
  
  The overflow flag is undefined when the shift count
  is greater than 1."
  
• shaolin007

  January 2005

  
  : newer CPUs have one line from each bit to every other bit which is controlled by a multiplex-chip.it needs more space on your cpu-die but offers shifts which are independ by the shift-count.
  :
  
  [green]
  I thought it was so, but I was unsure to say it.
  [/green]