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Need help for VHDL DICE Program Posted by MarkBadong on 7 Jan 2012 at 9:34 PM
Hi! I'd like to ask all the VHDL knowledgeable people out there for help regarding a problem I came upon in our book.

1. Using Xilinx ISE 7.1 (We use Windows XP you see) create a VHDL program that:

1. System is idle until a ROLL button is pressed.
2. While ROLL button is pressed, the system adds the sum of two dice counters (which pulse at different signals to randomize the answer).
2. If the sum is 2, 3 or 11, a WIN output is given.
3. If the sum is 7, a LOSE output is given.
4. If the sum is any other number, store it in memory. In the next roll, if the new sum = stored sum, win the round.
5. If none of these conditions are met, the system loops rolling the dice until you either WIN or LOSE.


I'm not sure how to implement it in VHDL just yet, but we are told to use Mealy or Moore FSM to simplify the program. Here's what I came up with: (see attachment)





 

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